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 INTEGRATED CIRCUITS
DATA SHEET
TDA8002C IC card interface
Product specification Supersedes data of 1999 Feb 24 File under Integrated Circuits, IC02 1999 Oct 12
Philips Semiconductors
Product specification
IC card interface
FEATURES * Single supply voltage interface (3.3 or 5 V environment) * Low-power sleep mode * Three specific protected half-duplex bidirectional buffered I/O lines * VCC regulation 5 V 5% or 3 V 5%, ICC < 55 mA for VDD = 3.0 to 6.5 V, with controlled rise and fall times * Thermal and short-circuit protections with current limitations * Automatic ISO 7816 activation and deactivation sequences * Enhanced ESD protections on card side (>6 kV) * Clock generation for the card up to 12 MHz with synchronous frequency changes * Clock generation up to 20 MHz (external clock) * Synchronous and asynchronous cards (memory and smart cards) * ISO 7816, GSM11.11 compatibility and EMV (Europay, MasterCard(R) and Visa) compliant * Step-up converter for VCC generation * Supply supervisor for spikes elimination and emergency deactivation * Chip select input for easy use of several TDA8002Cs in parallel. ORDERING INFORMATION PACKAGE TYPE NUMBER MARKING TDA8002CT/A/C1 TDA8002CT/B/C1 TDA8002CT/C/C1 TDA8002CG/C1 TDA8002CT/A TDA8002CT/B TDA8002CT/C TDA8002C LQFP32 plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm NAME SO28 DESCRIPTION APPLICATIONS IC card readers for: * GSM applications * Banking * Electronic payment * Identification * Pay TV * Road tolling. GENERAL DESCRIPTION
TDA8002C
The TDA8002C is a complete low-power analog interface for asynchronous and synchronous cards. It can be placed between the card and the microcontroller. It performs all supply, protection and control functions. It is directly compatible with ISO 7816, GSM11.11 and EMV specifications.
VERSION SOT136-1
plastic small outline package; 28 leads; body width 7.5 mm
SOT401-1
1999 Oct 12
2
Philips Semiconductors
Product specification
IC card interface
QUICK REFERENCE DATA SYMBOL Supplies VDD IDD(lp) IDD(idle) IDD(active) supply voltage supply current supply current supply current low-power Idle mode; fCLKOUT = 10 MHz active mode; VCC(O) = 5 V; fCLKOUT = 10 MHz fCLK = LOW; ICC = 100 A fCLK = 5 MHz; ICC = 10 mA fCLK = 5 MHz; ICC = 55 mA active mode; VCC(O) = 3 V; fCLKOUT = 10 MHz fCLK = LOW; ICC = 100 A fCLK = 5 MHz; ICC = 10 mA fCLK = 5 MHz; ICC = 55 mA Card supply VCC(O) output voltage active mode for VCC = 5 V ICC < 55 mA; DC load ICC = 40 nAs; AC load active mode for VCC = 3 V ICC < 55 mA; DC load ICC = 40 nAs; AC load General fCLK tde Ptot card clock frequency deactivation sequence duration continuous total power dissipation TDA8002CT/x TDA8002CG Tamb ambient temperature Tamb = -25 to +85 C Tamb = -25 to +85 C - - -25 - - - 0 60 - 80 2.76 2.76 - - 4.6 4.6 - - - - - - - - - - - - - - 3.0 - - - - - PARAMETER CONDITIONS MIN.
TDA8002C
TYP.
MAX.
UNIT
6.5 150 5
V A mA
8 50 140
mA mA mA
8 50 140
mA mA mA
5.4 5.4 3.24 3.24
V V V V
12 100 0.56 0.46 +85
MHz s W W C
1999 Oct 12
3
Philips Semiconductors
Product specification
IC card interface
BLOCK DIAGRAM
TDA8002C
handbook, full pagewidth
VDDD 100 nF
VDDA 100 nF 470 nF S1 S2 12
28 SUPPLY
13
14
STEP-UP CONVERTER ALARM 4 INTERNAL REFERENCE Vref INTERNAL OSCILLATOR 2.5 MHz
11 AGND
VOLTAGE SENSE 3 EN1 CLKUP
15 VUP 470 nF
CS
OFF
26 ALARM
EN2 PVCC VCC GENERATOR 23 100 nF 22 RST
VCC 100 nF
RSTIN CMDVCC MODE CV/TV CLKDIV1 CLKDIV2 CLKSEL STROBE
25 24 27 19 6 7 5 8 CLOCK CIRCUITRY LATCH EN4 EN5 SEQUENCER
RST BUFFER
CLOCK BUFFER
21 18
CLK PRES
CLKOUT
9 CLK 30 31 OSCILLATOR EN3 THERMAL PROTECTION
XTAL1 XTAL2
AUX1UC
1
I/O TRANSCEIVER
20
AUX1
TDA8002CG
AUX2UC 2 I/O TRANSCEIVER 17 AUX2
I/OUC
32
I/O TRANSCEIVER
16
I/O
10 DGND1
29 DGND2
FCE246
Fig.1 Block diagram.
1999 Oct 12
4
Philips Semiconductors
Product specification
IC card interface
PINNING PIN SYMBOL XTAL1 XTAL2 I/OUC AUX1UC AUX2UC CS TYPE CT/A 1 2 3 4 5 - TYPE CT/B 1 2 3 4 - 5 TYPE CT/C 1 2 3 4 - 5 TYPE CG 30 31 32 1 2 3 I/O I O I/O I/O I/O I DESCRIPTION crystal connection or input for external clock crystal connection data I/O line to and from microcontroller
TDA8002C
auxiliary line 1 to and from microcontroller for synchronous applications auxiliary line 2 to and from microcontroller for synchronous applications chip select control input for enabling pins I/OUC, AUX1UC, AUX2UC, CLKSEL, CLKDIV1, CLKDIV2, STROBE, CV/TV, CMDVCC, RSTIN, OFF and MODE; note 1 open drain PMOS reset output for microcontroller (active HIGH) control input signal for CLK (LOW = XTAL oscillator; HIGH = STROBE input) control input with CLKDIV2 for choosing CLK frequency control input with CLKDIV1 for choosing CLK frequency external clock input for synchronous applications clock output (see Table 1)
ALARM CLKSEL CLKDIV1 CLKDIV2 STROBE CLKOUT DGND1 AGND S2 VDDA S1 VUP I/O AUX2 PRES PRES CV/TV AUX1 CLK RST VCC CMDVCC RSTIN OFF
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 - - 21 22 23 24 25 26 27
6 7 8 9 10 11 12 13 14 15 16 17 18 - 19 20 - 21 22 23 24 25 26 27
6 7 8 9 10 11 12 13 14 15 16 17 18 - 19 - 20 21 22 23 24 25 26 27
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 - 19 20 21 22 23 24 25 26
O I I I I O
supply digital ground 1 supply analog ground I/O I/O I/O I/O I/O I I I I/O O O O I I O capacitance connection for voltage doubler capacitance connection for voltage doubler output of voltage doubler data I/O line to and from card auxiliary I/O line to and from card card input presence contact (active LOW) active HIGH card input presence contact card voltage selection input line (high = 5 V, low = 3 V); note 1 auxiliary I/O line to and from card clock to card output (C3I) (see Table 1) card reset output (C2I) supply for card (C1I) start activation sequence input from microcontroller (active LOW) card reset input from microcontroller open-drain NMOS interrupt output to microcontroller (active LOW) supply analog supply voltage
1999 Oct 12
5
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PIN SYMBOL MODE VDDD DGND2 Note 1. A pull-up resistor of 100 k connected to VDD is integrated. TYPE CT/A 28 - - TYPE CT/B 28 - - TYPE CT/C 28 - - TYPE CG 27 28 29 I/O I DESCRIPTION operating mode selection input (HIGH = normal; LOW = sleep)
supply digital supply voltage supply digital ground 2
handbook, halfpage
handbook, halfpage
XTAL1 1 XTAL2 2 I/OUC 3 AUX1UC 4 AUX2UC 5 ALARM 6 CLKSEL 7
28 MODE 27 OFF 26 RSTIN 25 CMDVCC 24 VCC 23 RST 22 CLK
XTAL1 1 XTAL2 2 I/OUC 3 AUX1UC 4 CS 5 ALARM 6 CLKSEL 7
28 MODE 27 OFF 26 RSTIN 25 CMDVCC 24 VCC 23 RST 22 CLK
TDA8002CT/A
CLKDIV1 8 CLKDIV2 9 STROBE 10 CLKOUT 11 DGND1 12 AGND 13 S2 14
FCE247
TDA8002CT/B
21 AUX1 20 PRES 19 AUX2 18 I/O 17 VUP 16 S1 15 VDDA CLKDIV1 8 CLKDIV2 9 STROBE 10 CLKOUT 11 DGND1 12 AGND 13 S2 14
FCE248
21 AUX1 20 PRES 19 PRES 18 I/O 17 VUP 16 S1 15 VDDA
Fig.2 Pin configuration (TDA8002CT/A).
Fig.3 Pin configuration (TDA8002CT/B).
1999 Oct 12
6
Philips Semiconductors
Product specification
IC card interface
TDA8002C
handbook, halfpage
XTAL1 1 XTAL2 2 I/OUC 3 AUX1UC 4 CS 5 ALARM 6 CLKSEL 7
28 MODE 27 OFF 26 RSTIN 25 CMDVCC 24 VCC 23 RST 22 CLK
TDA8002CT/C
CLKDIV1 8 CLKDIV2 9 STROBE 10 CLKOUT 11 DGND1 12 AGND 13 S2 14
FCE249
21 AUX1 20 CV/TV 19 PRES 18 I/O 17 VUP 16 S1 15 VDDA
Fig.4 Pin configuration (TDA8002CT/C).
31 XTAL2
30 XTAL1
27 MODE
AUX1UC AUX2UC CS ALARM CLKSEL CLKDIV1 CLKDIV2 STROBE
1 2 3 4
25 RSTIN
28 VDDD
32 I/OUC
handbook, full pagewidth
29 DGND2
26 OFF
24 CMDVCC 23 VCC 22 RST 21 CLK
TDA8002CG
5 6 7 8 20 AUX1 19 CV/TV 18 PRES 17 AUX2
DGND1 10
AGND 11
S2 12
VDDA 13
S1 14
VUP 15
I/O 16
9
Fig.5 Pin configuration (TDA8002CG).
1999 Oct 12
CLKOUT
FCE250
7
Philips Semiconductors
Product specification
IC card interface
FUNCTIONAL DESCRIPTION Power supply The supply pins for the chip are VDDA, VDDD, AGND, DGND1 and DGND2. VDDA and VDDD (i.e. VDD) should be in the range of 3.0 to 6.5 V. All card contacts remain inactive during power-up or power-down. On power-up, the logic is reset by an internal signal. The sequencer is not activated until VDD reaches Vth2 + Vhys2 (see Fig.6). When VDD falls below Vth2, an automatic deactivation sequence of the contacts is performed. Chip selection The chip select pin (CS) allows the use of several TDA8002Cs in parallel. When CS is HIGH, the pins RSTN, CMDVCC, MODE, CV/TV, CLKDIV1, CLKDIV2, CLKSEL and STROBE control the chip, pins I/OUC, AUX1UC and AUX2UC are the copy of I/O, AUX1 and AUX2 when enabled (with integrated 20 k pull-up resistors connected to VDD) and OFF is enabled. When CS goes LOW, the levels on pins RSTIN, CMDVCC, MODE, CV/TV, CLKDIV1, CLKDIV2 and STROBE are internally latched, I/OUC, AUX1UC and AUX2UC go to high-impedance with respect to I/O, AUX1 and AUX2 (with integrated 100 k pull-up resistors connected to VDD) and OFF is high-impedance. Supply voltage supervisor (VDD) This block surveys the VDD supply. A defined retriggerable pulse of 10 ms minimum (tW) is delivered on the ALARM output during power-up or power-down of VDD (see Fig.6). This signal is also used for eliminating the spikes on card contacts during power-up or power-down. When VDD reaches Vth2 + Vhys2, an internal delay (tW) is started. The ALARM output is active until this delay has expired. When VDD falls below Vth2, ALARM is activated and a deactivation sequence of the contacts is performed. Clock circuitry
TDA8002C
The TDA8002C supports both synchronous and asynchronous cards. There are three methods to clock the circuitry: * Apply a clock signal to pin STROBE * Use of an internal RC oscillator * Use of a quartz oscillator which should be connected between pins XTAL1 and XTAL2 or an external clock applied on XTAL1. When CLKSEL is HIGH, the clock should be applied to the STROBE pin. When CLKSEL is LOW, the internal oscillators is used. When an internal clock is used, the clock output is available on pin CLKOUT. The RC oscillator is selected by making CLKDIV1 HIGH and CLKDIV2 LOW. The clock output to the card is available on pin CLK. The frequency of the card clock can be the input frequency divided by 2 or 4, STOP low or 1.25 MHz, depending on the states of CLKDIV1 or CLKDIV2 (see Table 1). When STROBE is used for entering the clock to a synchronous card, STROBE should remain stable during activation sequence otherwise the first pulse may be omitted. Do not change CLKSEL during activation. When in low-power (sleep) mode, the internal oscillator frequency which is available on pin CLKOUT is lowered to approximately 16 kHz for power economy purposes.
1999 Oct 12
8
Philips Semiconductors
Product specification
IC card interface
TDA8002C
handbook, full pagewidth
VDD
Vth2 + Vhys2 Vth2 tW tW
ALARM
FCE272
Fig.6 ALARM as a function of VDD (tW pulse width minimum of 10 ms).
handbook, full pagewidth
CS
OFF, I/OUC AUX1UC, AUX2UC t SL t DZ
CS
INPUTS
FCE245
t IS
t SI
t ID
t DI
Fig.7 Chip select.
1999 Oct 12
9
Philips Semiconductors
Product specification
IC card interface
Table 1 Clock circuitry definition CLKSEL LOW LOW LOW LOW HIGH X(1) CLKDIV1 HIGH LOW LOW HIGH X(1) X(1) CLKDIV2 LOW LOW HIGH HIGH X(1) X(1)
TDA8002C
MODE HIGH HIGH HIGH HIGH HIGH LOW(2) Notes 1. X = don't care. 2. In low-power mode.
FREQUENCY OF FREQUENCY OF CLK CLKOUT
1 f 2 int 1 f 4 xtal 1 f 2 xtal 1 f 2 int
fxtal fxtal fxtal fxtal
1 2fint (3)
STOP low STROBE STOP low
3. fint = 32 kHz in low-power mode. I/O circuitry The three I/O transceivers are identical. The state is HIGH for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to VDD, thus ensuring proper operation in the event that VCC VDD. The first side on which a falling edge is detected becomes a master (input). An anti-latch circuitry first disables the detection of the falling edge on the other side, which becomes slave (output), see Fig.8. After a delay time td (between 50 and 400 ns), the logic 0 present on the master side is transferred on the slave side. When the input is back to HIGH level, a current booster is turned on during the delay td on the output side and then both sides are back to their idle state, ready to detect the next logic 0 on any side. In the event of a conflict, both lines may remain LOW until the software enables the lines to be HIGH. The anti-latch circuitry ensures that the lines do not remain LOW if both sides return HIGH, regardless of the prior conditions. The maximum frequency on the lines is approximately 200 kHz. When CS is HIGH, I/OUC, AUX1UC and AUX2UC are internally pulled-up to VDD with 20 k resistors. When CS is LOW, I/OUC, AUX1UC and AUX2UC are permanently HIGH (with integrated 100 k pull-up resistors connected to VDD).
handbook, full pagewidth I/O
I/OUC
td
td
td
conflict
idle
MGD703
Fig.8 Master and slave signals.
1999 Oct 12
10
Philips Semiconductors
Product specification
IC card interface
Logic circuitry After power-up, the circuit has six possible states of operation. Figure 9 shows the state diagram. IDLE MODE After reset, the circuit enters the idle mode. A minimum number of functions in the circuit are active while waiting for the microcontroller to start a session: * All card contacts are inactive * I/OUC, AUX1UC and AUX2UC are high-impedance * Oscillator (XTAL) runs, delivering CLKOUT * Voltage supervisor is active. ACTIVE MODE LOW-POWER MODE When pin MODE goes LOW, the circuit enters the low-power (sleep) mode. As long as pin MODE is LOW no activation is possible.
TDA8002C
If pin MODE goes LOW in the active mode, a normal deactivation sequence is performed before entering the low-power mode. When pin MODE goes HIGH, the circuit enters the normal operating mode after a delay of at least 6 ms (96 cycles of CLKOUT). During this time the CLKOUT remains at 16 kHz. * All card contacts are inactive * Oscillator (XTAL) does not operate * The VDD supervisor, ALARM output, card presence detection and OFF output remain functional * Internal oscillator is slowed to 32 kHz, providing 16 kHz on CLKOUT.
When the activation sequence is completed, the TDA8002C will be in the active mode. Data is exchanged between the card and the microcontroller via the I/O lines.
handbook, full pagewidth
ACTIVATION
POWER OFF IDLE MODE LOW-POWER MODE FAULT ACTIVE MODE
DEACTIVATION
MGE735
Fig.9 State diagram.
1999 Oct 12
11
Philips Semiconductors
Product specification
IC card interface
ACTIVATION SEQUENCE From Idle mode, the circuit enters the activation mode when the microcontroller sets the CMDVCC line LOW or sets the MODE line HIGH when the CMDVCC line is already LOW. The internal circuitry is then activated, the internal clock is activated and an activation sequence is executed. When RST is enabled it becomes the inverse of RSTIN. Figures 10 to 12 illustrate the activation sequence as follows: 1. Step-up converter is started (t1 t0)
TDA8002C
2. VCC rises from 0 to 3 or 5 V (t2 = t1 + 112T) (according to the state on pin CV/TV) 3. I/O, AUX1 and AUX2 are enabled and CLK is enabled (t3 = t1 + 4T); I/O, AUX1 and AUX2 were forced LOW until this time 4. CLK is set by setting RSTIN to HIGH (t4) 5. RST is enabled (t5 = t1 + 7T); after t5, RSTIN has no further action on CLK, but is only controlling RST. The value of VCC (5 or 3 V) must be selected by the level on pin CV/TV before the activation sequence.
handbook, full pagewidth OSC_INT/64
tact CMDVCC VUP VCC I/O CLK RSTIN RST t0 t1 t2 t3 LOW t4 t5
T = 25 s
FCE273
Fig.10 Activation sequence using RSTIN and CMDVCC.
1999 Oct 12
12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
handbook, full pagewidth OSC_INT/64
CLKDIV1 CLKDIV2 CMDVCC VUP VCC I/O CLK RSTIN RST t0 t1 t2 t3 LOW
tact
FCE274
Fig.11 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.
handbook, full pagewidth
CMDVCC
VCC I/O AUX1UC AUX1 RSTIN tact RST STROBE CLK
FCE251
Fig.12 Activation sequence for synchronous application.
1999 Oct 12
13
Philips Semiconductors
Product specification
IC card interface
DEACTIVATION SEQUENCE When a session is completed, the microcontroller sets the CMDVCC line to HIGH state or MODE line to LOW state. The circuit then executes an automatic deactivation sequence by counting the sequencer down and thus end in the Idle mode. Figures 13 and 14 illustrate the deactivation sequence as follows: 1. RST goes LOW (t11 t10) 2. CLK is stopped (t12 = t11 + 12T)
TDA8002C
3. I/O, AUX1 and AUX2 fall to zero (t13 = t11 + T) 4. VCC falls to zero (t14 = t11 + 112T); a special circuit ensures that I/O remains below VCC during the falling slope of VCC 5. VUP falls (t15 = t11 + 5T).
handbook, full pagewidth
tde
OSC_INT/64 t10 t15 VUP t14 VCC t13 I/O t12 CLK RSTIN RST t11
FCE479
CMDVCC
LOW
Fig.13 Deactivation sequence
1999 Oct 12
14
Philips Semiconductors
Product specification
IC card interface
Fault detection The following fault conditions are monitored by the circuit: * Short-circuit or high current on VCC * Removing card during transaction * VDD dropping * Overheating.
TDA8002C
When one or more of these faults are detected, the circuit pulls the interrupt line OFF to its active LOW state and a deactivation sequence is initiated. In the event that the card is present the interrupt line OFF is set to HIGH state when the microcontroller has reset the CMDVCC line HIGH (after completion of the deactivation sequence). In the event that the card is not present OFF remains LOW.
handbook, full pagewidth
tde
OSC_INT/64
OFF PRES
t10
t14 VCC t13 I/O t12 CLK RST t11
FCE480
LOW
Fig.14 Emergency deactivation sequence.
1999 Oct 12
15
Philips Semiconductors
Product specification
IC card interface
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); note 1. SYMBOL VDDD VDDA VCC PARAMETER digital supply voltage analog supply voltage card supply voltage pins; XTAL1, XTAL2, ALARM, CS, MODE, RSTIN, CLKSEL, AUX2UC, AUX1UC, CLKDIV1, CLKDIV2, CLKOUT, STROBE, CMDVCC, CV/TV and OFF input voltage on card contact pins; I/O, AUX2, PRES, PRES, AUX1, CLK, RST and VCC electrostatic handling voltage on pins I/O, AUX2, PRES, PRES, AUX1, CLK, RST and VCC on all other pins Tstg Ptot storage temperature continuous total power dissipation TDA8002CT/x TDA8002CG Tamb Tj Note ambient temperature junction temperature Tamb = -25 to +85 C Tamb = -25 to +85 C - - -25 - -6 -2 -55 CONDITIONS MIN. -0.3 -0.3 -0.3
TDA8002C
MAX. +6.5 +6.5 +6.5 V V V
UNIT
Vi(card)
-0.3
+6.5
V
Ves
+6 +2 +125 0.56 0.46 +85 150
kV kV C W W C C
1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied. HANDLING Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining. Method 3015 (HBM 1500 , 100 pF) 3 positive pulses and 3 negative pulses on each pin with respect to ground. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) SOT136-1 SOT401-1 PARAMETER thermal resistance from junction to ambient CONDITIONS in free air 70 91 K/W K/W VALUE UNIT
1999 Oct 12
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Philips Semiconductors
Product specification
IC card interface
CHARACTERISTICS VDD = 3.3 V; Tamb = 25 C; fxtal = 10 MHz; unless otherwise specified. SYMBOL Supplies VDD IDD(lp) IDD(idle) IDD(active) supply voltage supply current supply current supply current low-power mode Idle mode; fCLKOUT = 10 MHz active mode; VCC(O) = 5 V; fCLKOUT = 10 MHz fCLK = LOW; ICC = 100 A fCLK = 5 MHz; ICC = 10 mA fCLK = 5 MHz; ICC = 55 mA active mode; VCC(O) = 3 V; fCLKOUT = 10 MHz fCLK = LOW; ICC = 100 A fCLK = 5 MHz; ICC = 10 mA fCLK = 5 MHz; ICC = 55 mA Vth2 Vhys2 Card supply VCC(O) output voltage Idle mode active mode VCC = 5 V; ICC < 55 mA; DC load ICC = 40 nAs; AC load VCC = 3 V; ICC < 55 mA; DC load ICC = 24 nAs; AC load ICC(O) SR output current slew rate VCC(O) = from 0 to 5 or 3 V VCC short-circuited to ground rising or falling slope Crystal connections (XTAL1 and XTAL2) Cext fxtal external capacitors resonance frequency note 1 note 2 - 2 15 - 4.6 4.6 2.76 2.76 - - 0.10 - - - - - 200 0.15 - - threshold voltage on VDD for falling voltage supervisor hysteresis on Vth2 - - - 2.2 50 - - - - 100 - - - - - - 3 - - - - - PARAMETER CONDITIONS MIN. TYP.
TDA8002C
MAX.
UNIT
6.5 150 5
V A mA
8 50 140
mA mA mA
8 50 140 2.4 150
mA mA mA V mV
0.3 5.4 5.4 3.24 3.24 55 - 0.20 - 24
V V V V V mA mA V/s
pF MHz
1999 Oct 12
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Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL Data lines GENERAL td(edge)
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
delay between falling edge of I/O, AUX1, AUX2, I/OUC, AUX1UC and AUX2UC rise and fall times maximum frequency on data lines Ci = Co = 30 pF
-
-
1
s
tr, tf fI/O(max)
- -
- -
0.5 200
s kHz
DATA LINES I/O, AUX1 AND AUX2 (WITH 10 K PULL-UP RESISTOR CONNECTED TO VCC) Vo VOH VOL VIH VIL Vidle Rpu Iedge IIL IIH output voltage HIGH-level output voltage on data lines Idle and low-power modes IOH = -20 A 0 0.8VCC - 0.6VCC 0 - 8 - VIL = 0.4 V VIH = VCC - - - - - - - - 10 1 - - 0.3 VCC 0.4 VCC 0.5 0.4 12 - -600 10 V V V V V V k mA A A
LOW-level output voltage on II/O = 1 mA data lines HIGH-level input voltage on data lines LOW-level input voltage on data lines voltage on data lines outside a session internal pull-up resistance between data lines and VCC current from data lines when active pull-up is active LOW-level input current on data lines HIGH-level input current on data lines
DATA LINES I/OUC, AUX1UC AND AUX2UC (WITH 20 K PULL-UP RESISTOR CONNECTED TO VDD WHEN CS IS HIGH AND 100 K WHEN CS IS LOW) VOH VOL VIH VIL Zidle HIGH-level output voltage on data lines IOH = -20 A VDD - 1 - 0.7VDD 0 10 - - - - - VDD + 0.2 0.4 VDD 0.3VDD - V V V V M
LOW-level output voltage on II/OUC = 1 mA data lines HIGH-level input voltage on data lines LOW-level input voltage on data lines impedance on data lines outside a session
ALARM and OFF when connected (open-drain outputs) IOH(OFF) HIGH-level output current on pin OFF VOH(OFF) = 5 V - - 5 A
1999 Oct 12
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Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL VOL(OFF) IOL(ALARM) VOH(ALARM) tW
PARAMETER
CONDITIONS - -
MIN. - - - - -
TYP.
MAX. 0.4 -5 - 20
UNIT V A V ms
LOW-level output voltage on IOL(OFF) = 2 mA pin OFF LOW-level output current on VOL(ALARM) = 0 V pin ALARM HIGH-level output voltage on pin ALARM ALARM pulse width IOH(ALARM) = -2 mA
VDD - 1 6
Clock output (CLKOUT; powered from VDD) fCLKOUT VOL VOH tr, tf fint frequency on CLKOUT low power LOW-level output voltage HIGH-level output voltage rise and fall times duty factor IOL = 1 mA IOH = -1 mA CL = 15 pF; notes 3 and 4 CL = 15 pF; notes 3 and 4 active mode sleep mode 0 - 0 - 40 20 - 0.5 - 8 60 MHz kHz V V ns % 16 - - - 2.5 32 - - - - - - - - - - - - - -
VDD - 0.5 -
Internal oscillator frequency of internal oscillator 2 - 0 - 0 - 0 0 - 45 0.2 3 - 0.3 100 0.3 VCC 0.5 MHz kHz
Card reset output (RST) VO(inact) td(RST) VOL VOH tr, tf VO(inact) VOL VOH tr, tf SR output voltage delay between RSTIN and RST LOW-level output voltage HIGH-level output voltage rise and fall times inactive modes RST enabled IOL = 200 A IOH = -200 A CL = 30 pF inactive modes IOL = 200 A IOH = -50 A CL = 30 pF; note 3 CL = 30 pF; note 3 V ns V V ns
VCC - 0.5 -
Card clock output (CLK) output voltage LOW-level output voltage HIGH-level output voltage rise and fall times duty factor slew rate (rise and fall) 0.3 0.3 VCC 8 55 - 10 0.3VDD VDD 0.3VDD VDD V V V ns % V/ns
VCC - 0.5 -
Strobe input (STROBE) fSTROBE VIL VIH VIL VIH frequency on STROBE LOW-level input voltage HIGH-level input voltage 0 0 0.7VDD 0 0.7VDD MHz V V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 5 LOW-level input voltage HIGH-level input voltage V V
1999 Oct 12
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Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL
PARAMETER
CONDITIONS
MIN. - - - - - -
TYP.
MAX.
UNIT
LOGIC INPUTS (CV/TV AND CS) (INTEGRATED 10 K PULL-UP RESISTOR CONNECTED TO VDD); note 5 VIL VIH VIL VIH IIL(PRES) IIH(PRES) Protections Tsd ICC(sd) Timing tact tde t3 t5 tIS tSI tID tDI tSL tDZ activation sequence duration deactivation sequence duration start of the window for sending CLK to the card end of the window for sending CLK to the card time from input to select time from select to input time from input to deselect time from deselect to input time from select to low impedance time from deselect to high impedance maximum rise time on pin CS maximum fall time on pin CS pull-up resistor at pin OFF = 10 k; 1 device 2 devices in parallel tr(max) tf(max) guaranteed by design; see Fig.12 guaranteed by design; see Fig.14 see Figs 10 and 11 see Fig.11 - 50 - 150 100 1000 1000 100 - - - - - 180 70 - - - - - - - - - - - 220 100 130 - - - - - 40 6 3 100 100 s s s s ns ns ns ns ns ns ns ns ns shut-down local temperature shut-down current at VCC - - 135 - - 90 C mA LOW-level input voltage HIGH-level input voltage 0 0.7VDD 0 0.7VDD VOL = 0 V - - 0.3VDD VDD 0.3VDD VDD -10 10 V V
Logic inputs PRES and PRES; note 5 LOW-level input voltage HIGH-level input voltage LOW-level input current on pin PRES HIGH-level input current on pin PRES V V A A
1999 Oct 12
20
Philips Semiconductors
Product specification
IC card interface
Notes
TDA8002C
1. It may be necessary to connect capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or resonator. 2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH. t1 3. The transition time and duty cycle definitions are shown in Fig.15; = -------------t1 + t2 4. CLKOUT transition time and duty cycle do not need to be tested. 5. PRES and CMDVCC are active LOW; RSTIN, PRES and CS are active HIGH.
handbook, full pagewidth
tr 90%
tf 90% VOH 1/2 VCC 10% t1 10% t2 VOL
MGE741
Fig.15 Definition of transition times.
1999 Oct 12
21
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ull pagewidth
1999 Oct 12
3.3 V or 5 V J1 1 C1 100 nF ground J1 2 C4 C3 C2 C1 C5I C6I C7I C8I
APPLICATION INFORMATION
Philips Semiconductors
IC card interface
VDD VDD VCC P0-0 P0-1 P0-2 P0-3 P0-4 P0-5 P0-6 P0-7 EA ALE PSEN P2-7 P2-6 P2-5 P2-4 P2-3 P2-2 P2-1 P2-0
C2 10 F P1-0 33 pF 33 pF P1-1 P1-2 MODE OFF C3(2) 100 nF RSTIN CMDVCC VCC RST CLK AUX1 CV/TV 28 27 26 25 24 23 22 21 20 19 18 17 16 15 IC1 1 2 3 4 5 6 XTAL1 XTAL2 I/OUC AUX1UC CS ALARM CLKSEL CLKDIV1 CLKDIV2 STROBE CLKOUT DGND1 AGND S2 14.745 MHz P1-3 P1-4 P1-5 P1-6 P1-7 RST P3-0 P3-1 P3-2 P3-3 P3-4 P3-5 P3-6 P3-7 XTAL2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 IC2 40 39 38 37 36 35 34 33 32
C8 C7 C6 C5 C1I C2I C3I C4I
TDA8002CT/C
7 8 9 10 11 12 13 14
80C51
31 30 29 28 27 26 25 24 23 22 21
FCE195
22
CARD READ
(1) K1
PRES I/O VUP S1 C6(5) 470 nF C4(3) 100 nF C5(4) 470 nF VDDA
K2
C7 100 nF
C8 10 F VDD
18 XTAL1 19 VSS 20
TDA8002C should be placed as close as possible to the card reader. (1) Contact normally open. (2) C3 close to pin VCC of TDA8002C. (3) C4 close to C1 contact of card reader. (4) C5 close to VUP pin of TDA8002C. (5) C6 as close as possible to pins S1 and S2.
Product specification
TDA8002C
CLK line may be shielded with respect to other lines. Decoupling capacitors C7 and C8 may be placed as close as possible to pin VDDA. A good ground plane is recommended.
Fig.16 Application diagram.
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book, full pagewidth
XTAL1
XTAL2
RSTIN
MODE VDDD
OFF
C4 C3 C2 C1 C5I C6I C7I C8I
C8 C7 C6 C5 C1I C2I C3I C4I C3(2) 100 nF
I/OUC
100 nF
DGND2
I/O
DGND1
VUP
S1
VDDA
S2
AGND
CLKOUT
1999 Oct 12
VDD 3.3 V or 5 V J1 1 C1 100 nF ground J1 2 C2 10 F C9 VDD CMDVCC VCC RST CLK AUX1 CV/TV CARD READ PRES AUX2
(1) K1
Philips Semiconductors
IC card interface
VDD P1-0 33 pF 33 pF P1-1 P1-2 14.745 MHz P1-3 P1-4 P1-5 1 2 3 IC1 4 5 6 7 8 16 15 14 13 12 11 10 9 AUX1UC AUX2UC CS ALARM CLKSEL CLKDIV1 CLKDIV2 STROBE P1-6 P1-7 RST P3-0 P3-1 P3-2 P3-3 P3-4 P3-5 P3-6 P3-7 XTAL2 XTAL1 VSS C7 100 nF C8 10 F VDD VCC P0-0 P0-1 P0-2 P0-3 P0-4 P0-5 P0-6 P0-7 EA ALE PSEN P2-7 P2-6 P2-5 P2-4 P2-3 P2-2 P2-1 P2-0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 IC2
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
FCE196
25 26 27 28 29 30 31 32 24 23 22 21 20 19 18 17
23
TDA8002CG
80C51
K2
C6(5) 470 nF C4(3) 100 nF C5(4) 470 nF
TDA8002C should be placed as close as possible to the card reader. (1) Contact normally open. (2) C3 close to pin VCC of TDA8002C. (3) C4 close to C1 contact of card reader. (4) C5 close to VUP pin of TDA8002C. (5) C6 as close as possible to pins S1 and S2.
Product specification
TDA8002C
CLK line may be shielded with respect to other lines. Decoupling capacitors C7, C8 and C9 may be placed as close as possible to pin VDDA and VDDD. A good ground plane is recommended.
Fig.17 Application diagram (for more details, see "Application note AN98054").
Philips Semiconductors
Product specification
IC card interface
PACKAGE OUTLINES SO28: plastic small outline package; 28 leads; body width 7.5 mm
TDA8002C
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
ISSUE DATE 95-01-24 97-05-22
1999 Oct 12
24
Philips Semiconductors
Product specification
IC card interface
TDA8002C
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c y X
24 25
17 16 ZE
A
e E HE wM bp 32 1 8 9 L detail X Lp A A2 A1 pin 1 index (A 3)
e bp D HD
ZD wM B
vM A
vM B
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.60 A1 0.15 0.05 A2 1.5 1.3 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 5.1 4.9 E (1) 5.1 4.9 e 0.5 HD 7.15 6.85 HE 7.15 6.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT401-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-12-19 97-08-04
1999 Oct 12
25
Philips Semiconductors
Product specification
IC card interface
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
TDA8002C
* For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Oct 12
26
Philips Semiconductors
Product specification
IC card interface
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable suitable suitable suitable suitable suitable
TDA8002C
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
1999 Oct 12
27
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 68
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/25/03/pp28
Date of release: 1999
Oct 12
Document order number:
9397 750 06149


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